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i.mx53: g_oalAddressTable/oemaddrtab and External Interface Module RRS feed

  • Question

  • Dear Experts,
    OS: WinEC7 , Platform: freescale i.mx53 custom board, 512MB RAM.
    I add a non-PCI Ethernet controller to my platform through External Interface Module (SRAM-like interface).
    The range of data port memory region equals to or larger than 10 Kbytes for this Ethernet controller.
    The sum of all CS spaces must equal 128M, and can be splitted between maximum 4 CSs.
    -
    In my case, I split CS spaces to two chip selects. CS0 and CS1, 64MB for each.
    The system memory map base address of Chip select 0 is 0xF0000000.  
    CSP_BASE_MEM_PA_CS0 EQU (0xF0000000)
    The system memory map base address of Chip select 1 should be 0xF4000000. (64MB for each)
    This Ethernet controller will be selected by CS1.
    -
    Question:
    Do I need to add g_oalAddressTable map for this CS1 ??
    g_oalAddressTable will be only useful for OALPAtoUA/OALPAtoVA/OALVAtoPA/... in OAL layer ??
    //=========================================
    for example:
    Do I need to modify g_oalAddressTable map to 
    g_oalAddressTable
        DCD 0x80000000, CSP_BASE_MEM_PA_CSD0, 464				; RAM image mapping
        DCD 0x9D000000, CSP_BASE_MEM_PA_CS0, 32					; EIM CS0
        DCD 0x9F000000, CSP_BASE_MEM_PA_CS1, 1					; EIM CS1
        DCD 0x9F100000, CSP_BASE_REG_PA_IPU_CM_1MB, 1		; IPUv3 regs, CM,IDMAC,DP,DI0,DI1,DC,DMFC
        DCD ...
    		
    define CSP_BASE_MEM_PA_CS1 0xf4000000
    -
    Below is original g_oalAddressTable
    g_oalAddressTable
        DCD 0x80000000, CSP_BASE_MEM_PA_CSD0, 464           ; RAM image mapping
        DCD 0x9D000000, CSP_BASE_MEM_PA_CS0, 33             ; 32M reserved for WEIM, last 1M reserved for SPI
        DCD 0x9F100000, CSP_BASE_REG_PA_IPU_CM_1MB, 1       ; IPUv3 regs, CM,IDMAC,DP,DI0,DI1,DC,DMFC
        DCD 0x9F200000, CSP_BASE_REG_PA_IPU_CPMEM_1MB, 1    ; IPUv3 regs, CPMEM,SRM, DC template
        DCD 0x9F300000, CSP_BASE_REG_PA_SATA, 1             ; SATA regs
        DCD 0x9F400000, CSP_BASE_REG_PA_SATA_P0, 1          ; SATA P0 regs
        DCD 0x9F500000, CSP_BASE_MEM_PA_NFC_1MB, 5          ; NFC internal buffer
        DCD 0x9FA00000, CSP_BASE_MEM_PA_IRAM_1MB, 1         ; Internal RAM
        DCD 0x9FB00000, CSP_BASE_REG_PA_TZIC_1MB, 1         ; TZIC regs
        DCD 0x9FC00000, CSP_BASE_MEM_PA_ROM, 1              ; Internal ROM
        DCD 0x9FD00000, CSP_BASE_MEM_PA_AIPS1, 1            ; AIPS1 SPBA peripheral regs
        DCD 0x9FE00000, CSP_BASE_REG_PA_AIPS1, 1            ; AIPS1 peripheral regs
        DCD 0x9FF00000, CSP_BASE_REG_PA_AIPS2, 1            ; AIPS2 peripheral regs
        DCD 0x00000000, 0x00000000, 0
    






    • Edited by oobin168 Wednesday, October 26, 2011 5:39 AM
    Wednesday, October 26, 2011 5:34 AM

All replies

  • Yes you need to add the CS1 address space to your oalAddressTable to make sure that you can access that memory. It is also used in the complet system when ever you do MmMapIoSpace or VirtualAlloc that information will be used.

    Best regards,

    Mike


    Digi International Inc http://www.digi.com
    Wednesday, October 26, 2011 10:52 AM
  • Dear Mike,

    I configure 64MB system memory map for each CS, 

    but Ethernet controller only need 1MB for data memory.

    Could I just define 1MB size for the CS physical base address ??

    >>  DCD 0x9F000000, CSP_BASE_MEM_PA_CS1, 1 ; EIM CS1

     

    I try MmMapIoSpace to map CSP_BASE_MEM_PA_CS0(0xf0000000) in wince driver,

    but the return address is not 0x9D000000 that defined in g_oalAddressTabl.


    By the way, I didn't define watchdog physical address in g_oalAddressTabl,

    but I can enable watchdog by using MmMapIoSpace in driver ~

    Can u tell me why this happened ??~

     

    thx

    HB



    • Edited by oobin168 Wednesday, October 26, 2011 3:19 PM
    Wednesday, October 26, 2011 3:19 PM
  • Yes you can also configure only 1MB it is not necessary to setup the 64MB if you don't need the complete address space.

    The truth is I have seen that also on our BSP now with Windows CE 7. I am not very familar with these stuff in but is seems like that now Windows CE 7 supports 4GB of physical address space you might not need to configure that in the oemAddrtable.

    You could try to access the external bus without adding that configration to your oemaddrtable.

    Best regards,

    Mike


    Digi International Inc http://www.digi.com
    Wednesday, October 26, 2011 3:24 PM
  • Dear Mike,

    I also try it in Windows CE 7. 

    I will check external bus without adding that later.

    And I will check the same situation in WinCE6, too.

    Thx~


    Wednesday, October 26, 2011 3:33 PM
  • The bottom line is if you only access Ethernet controller via MmMapIoSpace in Driver, then you don't need to worry about OEMAddressTable.
    It is for OAL and those OAL PA <-> VA translation use only.
    Actually, for later ARMv7 processors, ARM strongly recommend avoid conflict cache mapping (same PA mapp with different cache settings).
    Therefore, if you are using CE7, it will be better migrating all of the peripherals mapping to new OEMDeviceTable and leave only cacheable memory mapping in OEMAddressTable. For detail refer to http://msdn.microsoft.com/en-us/library/gg155720.aspx
    Wednesday, October 26, 2011 6:18 PM