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EBOOT reset in startup.s RRS feed

  • Question

  • Relevant Details:
    OS: Windows Embedded Compact 7
    HW: TI AM3358 processor on custom designed board which is influenced by the TMDXEVM3358 Evaluation Module design
    BSP: Windows Embedded Compact 7 TI ARM-A8 BSP Version 02.30.00 From Adeneo Embedded with modifications to support our custom board

    We are currently in the board bring-up stage for our custom designed board with AM3358 processor.  We are able to run XLDR (MLO) from SD Card which in turn then tries to run EBOOT, but after the text output of "jumping to ebootsd image" the processor resets and then XLDR runs and the same thing happens in a continuous cycle of resets. 

    I was able to prove that the C code parts of EBOOT were not executing yet by putting an infinite loop at the start of main.c::main, and the processor still reset, so it suggested to me that the reset was occuring prior to EBOOT main. I placed infinite loops into EBOOT startup.s which is the entry point for EBOOT and found that it was resetting in the loop that creates and stores descriptors for entries in the g_oalEbootAddressTable table defined in C:\WINCE700\platform\SMART_TC_AM33X_BSP\SRC\inc\addrtab_cfg.inc and shown below:

    g_oalEbootAddressTable
    DCD 0x80000000, 0x80000000, 256 ; 0x10000000 SDRAM
    ;----------------------------------------------------------------------------------------
    DCD 0x90000000, 0x48000000, 4; L4S
    DCD 0x90400000, 0x4A000000, 4; L4F
    DCD 0x90800000, 0x44C00000, 4; L4WKUP
    DCD 0x90C00000, 0x47C00000, 4; L4FW
    DCD 0x91000000, 0x40300000, 1; OCMC RAM
    DCD 0x91100000, 0x08000000, 16; NAND Flash SC0
    DCD 0x92100000, 0x49000000, 1; TPCC
    DCD 0x92200000, 0x49800000, 3; TPTC
    DCD 0x92500000, 0x46000000, 8; McASP
    DCD 0x92D00000, 0x47400000, 4; USB/CPPI
    DCD 0x93100000, 0x47800000, 1; MMCHS2
    DCD 0x93200000, 0x53000000, 1; SHA
    DCD 0x93300000, 0x53400000, 1; AES0
    DCD 0x93400000, 0x54C00000, 4; ADC_TSC
    DCD 0x93800000, 0x56000000, 16; SGX530
    DCD 0x94800000, 0x40200000, 1; SRAM
    DCD 0x94900000, 0x4C000000, 1; EMIF0
    DCD 0x94A00000, 0x50000000, 1; GPMC
    ;----------------------------------------------------------------------------------------
    DCD 0x00000000, 0x00000000, 0 ; end of table

    The last place in startup.s where I can place my inifinite loop such that it is hit before the reset is above the 'bne %B28' line shown below.  To me, there is no obvious reason why this particular line would cause a reset though.

    ; Store the descriptor at the proper (physical) address
    ;
    28 str r0, [r2], #4
    add r0, r0, #0x00100000 ; Section descriptor for the next 1MB mapping (just add 1MB).
    sub r4, r4, #1 ; Decrement number of MB left.
    cmp r4, #0 ; Done?
    ;bl LoopForever ; test to see if we get here, i.e. does it hang?
    bne %B28 ; No - map next MB.

    We have managed to get u-boot up and running such that we can use its command line interface and it doesn't reset yet EBOOT is resetting.

    I realise it may be a tricky one but hoping someone may have some ideas.

    Thanks

    John

    Wednesday, May 22, 2013 12:56 PM

Answers

  • This looks like it was a DDR configuration issue causing the problem, I changed the DDR configuration settings to match that of my U-boot configuration and it proceeded into EBOOT and gets to the EBOOT menu.

    • Marked as answer by kornysoftware Wednesday, May 22, 2013 2:22 PM
    Wednesday, May 22, 2013 2:22 PM