none
Random exceptions after OAL RRS feed

  • Question

  • I am working on a Windows CE 6.0 R3 platform which was running fine before I increase the CPU clock speed. Once the clock is increased and now I see random exceptions (undefined instruction, data abort, prefetch abort) being printed on the debug console during OAL/drivers loading. It happens to a few boards only and if I adjust the same board to run at lower CPU clock speed, the issue will go away.

    It's a ARM processor with MMU, L1 & L2 cache and co-processor. So there is another finding that disabling the L2 cache will allow the board to run at increased clock speed too, without a problem.

    Based on some investigations it does not look like a hardware issue so is there anything in the OAL that I might have overlooked? 

     
    Tuesday, March 19, 2013 9:49 AM

All replies

  • Usually there's a whole set of cautions in processor data sheet concerning changing clock speeds. It's a wild guess but you might be required to flush all caches after execution of a clock change instruction. "Read the manual" is the first suggestion. If you are externally changing an oscillator to change the speed, observe the output signal to the CPU from that oscillator during the change. Many such designs will generate a wide variety of waveform shapes during a frequency change, possibly generating an unusable waveform for the CPU. Beyond that I'd be guessing even more wildly...

    Paul T.

    Wednesday, March 20, 2013 7:08 PM
  • Instead of changing the CPU clock dynamically, configure it at compile time and boot the device.

    If it works fine then i believe you should look into Paul's assumptions.

    --- Misbah


    Senior Design Engineer T.E.S Electroni Solutions (Bangalore-India) www.tes-dst.com email-misbah.khan@tes-dst.com

    Thursday, March 21, 2013 5:08 AM