No C-State transition occurs when ISR/DPC runs RRS feed

  • Question

  • Hi. I want to ask you a question about ISR/DPC and C-State.

    When I was investigating performance of my laptop using xperf, I found that C-State could stay at C3 state although ISR/DPC used 100% of the CPU at the moment.

    I think it's bizarre because C3 means that the internal clock is stopped and CPU has to be woken up to C0 in order to make ISR/DPC executed.

    Why can such a thing happen? 

    The figure below shows one of the events I met.

    Monday, August 13, 2012 9:07 AM