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Jitter Reduction RRS feed

  • Question

  • I'm working with WEC7 Intel Atom E3845 platform .Need to reduce jitter as much as possible in this x86 BSP. currently jitter measured as 100us in oscilloscope. what could be minimum jitter can be achieved with Intel x86? Please suggest some jitter reduction techniques and optimization methods to minimize.

    Thanks in advance.

    Regards,

    Surendran T 

    Tuesday, October 25, 2016 10:58 AM

Answers

  • Hi Surendran,

    do you mean interrupt latencys? The E3845 is a quad core CPU. Do you have SMP enabled? Are the cores also enabled in the BIOS?

    Try to disable core 2-4, so that you only have one core.

    Also you can adjust the maximum CPU power states in the BIOS, so that the cores do not enter sleep modes. This reduces respond times. The resulting jitter should be the minimum.

    Kind regards,

    Pascal

    • Marked as answer by Surendran_T Friday, October 28, 2016 4:48 AM
    Tuesday, October 25, 2016 12:15 PM

All replies

  • Hi Surendran,

    do you mean interrupt latencys? The E3845 is a quad core CPU. Do you have SMP enabled? Are the cores also enabled in the BIOS?

    Try to disable core 2-4, so that you only have one core.

    Also you can adjust the maximum CPU power states in the BIOS, so that the cores do not enter sleep modes. This reduces respond times. The resulting jitter should be the minimum.

    Kind regards,

    Pascal

    • Marked as answer by Surendran_T Friday, October 28, 2016 4:48 AM
    Tuesday, October 25, 2016 12:15 PM
  • Thanks Pascal

    Yes,i meant interrupt latency.And i measured with SMP disabled . But i'm not sure cores are enabled in BIOS.if so i will try to disable it .

    I have some other ideas to minimize the jitter,correct me if i'm wrong

    1.Assigning thread priority efficiently ,which will improve overall response time.
    2.Interrupt handler functions,where i should avoid doing complex actions .
    3.Proper code practice (data structure,algorithm.etc ).

    Will this action points help me out ?

    Regards,

    Surendran

    Wednesday, October 26, 2016 5:03 AM
  • Hi Surendran!

    I am using the intel E3825 (Advantech PCM-9365 board) with WEC7 in a "real time" environment so kind of in the same boat :)  

    I measured jitter (not latency on ours) and the 100usec was about the best I could do in my dll running at very high priority (meaning ThreadPriority set at 10).

    Quick thoughts:

    • My performance was terrible without SMP enabled in the build options of platform builder.
    • What BSP release are you using?  (No mater manufacturer of board will be based on a intel BSP relase).  Releases weren't really stable till intel release 3.1.  Release 4 implemented APIC instead of legacy intel 8259 PIC could help.
    • PLEASE NOTE:  we found a very intermittent bug (could be inherent in Intel's BSP4 release) where after about 1 week sitting in idle with alot of interrupts running - micro would get lost and freeze.  This NEVER happened in BSP 3.1
    • If using BSP based on intel version 3.1 - make sure your real time thread and hardware is using a DEDICATED interrupt (not sharing) - this will help considerably.  We had to go to Advantech and have a special BIOS made to have a dedicated interrupt.

    It is possible - the 100usec is about the best you can do  (getting in that order of magnitude).  If you have any questions please reply here and will do what i can to help (know the feeling) :).

    Take care,

    WillieJoe

    Link to Intel BSP Documentation for E3800 processor family:

    http://www.intel.com/content/www/us/en/embedded/products/bay-trail/bsp-for-wec7-and-2013-for-atom-e3800-release-notes.html


    Sunday, December 11, 2016 1:29 PM
  • Hi willieJoe,

    I use BSP based on Rel 1.0.From this i can observe 100us of jitter (with SMP disabled).I haven't measured with SMP enabled.

    Since I'm using release 1.0,i have no option to use dedicated interrupt(not sure about dedicated interrupt in release 1.0).
    But in my workaround its already 100us now .Hope i can reduce more.
    when I reduce some system load by removing Ethernet port1 dll and USB controller dll's ,i can see gradual decrease on jitter(around 90us).

    Any suggestion on this above observation? why do Ethernet and USB dll's take more latencies ?

    Thanks williejoe

    Regards,
    Surendran

    Monday, December 12, 2016 8:23 AM
  • Hi Surendran!

    1.)  Dedicated Interrupt:

    • I had to get a custom BIOS change to get a dedicated interrupt with BSP3.1 or lower (PIC8259 legacy interrupt controller)
    • BSP4 Implements the APIC (Advanced PIC) - so would definitely have a dedicated IRQ (no BIOS change)
    • Legacy cascaded 8259 PICs only give you 15 IRQ's and most reserved for legacy.
    • APIC - not as familiar with with near 100 IRQ's so dedicated IRQ.
    • If purchased a board with E3800 - might want to ask vendor for updated BSP (version 5.0 was just released)

    2.)  Why Ethernet and USB (when removed) reduce jitter:

    • My best guess is there is interrupt sharing going on with your hardware and Ethernet or USB hardware.
    • If sharing interrupt - the ISR must determine which hardware is requesting the Interrupt which takes more time and can cause more jitter.
    • If dedicated IRQ - the system KNOWS what SysIntr# and IST to run immediately (less jitter).

    3.)  How determine who is using what IRQ's:

    • We cloned the PCI driver and added Serial debug messages to tell who is using what IRQs (see below)
    • The PCIbus source code is under WINCE700\public\COMMON\oak\drivers\PCIbus\
    • Or even easier - download the CE Simple Little Registry Editor (from Bruce Eitman) and run on the Target device.  Look at HKLM\Drivers\BuiltIn\PCI\Instance and will show in the IRQ key for each device what was assigned during PCI enumeration.

    Hope this helps a little - if can help more - contact me anytime!

    WillieJoe

    Debug Output showing PCI enumeration and IRQ assignments.


    • Edited by WillieJoe2 Tuesday, December 13, 2016 4:43 PM Added pic of serial output
    Tuesday, December 13, 2016 4:26 PM
  • Hi willieJoe,

    Thanks for the detailed post.

    1.) Dedicated Interrupt:
    Now i got Maintenance Release 4 ,with this BSP  descent cut-down in jitter compare to initial release .Information you provide regarding APIC leads me to get this BSP MR4,Thanks williejoe

    2)Why Ethernet and USB (when removed) reduce jitter:
    In release 4, APIC uses dedicated IRQ .Removing Ethernet and USB drivers causes no impact on jitter. So I dropped this action point.

    Next I proceeded with priority inversion/thread switching ,but my Bad-luck inversion is not happening.
    So far i can give nearly 60us as best .Further hoping to reduce.

    Best regards,
    Surendran


    Tuesday, December 20, 2016 10:30 AM
  • Hi Surendran!

    Glad to hear getting closer - 60usec with pretty darn good with WEC7 - but sounds like ya got a plan to get lower :)

    IMPORTANT NOTE:

    • With BSP4 - we had a very intermittent bug.
    • With alot of interrupts running (about 1 every 1msec) even just in idle.
    • If let sit on bench for about 1 to 2 weeks - would lock up completely dead.
    • Never figured out why or how - and had to revert back to BSP3 for reliability.
    • This could be in the INTEL BSP4 MR or could be something my vendor did (hard to know).
    • Just keep in mind :)

    One other thing to consider:

    • It's usually frowned upon - but if you would implement your interrupt service routine code in the ISR (interrupt service routine) instead of a IST (interrupt service thread) - this could buy you some microseconds.



    • Edited by WillieJoe2 Tuesday, December 20, 2016 2:51 PM added phone instead of wrong link
    Tuesday, December 20, 2016 2:46 PM