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Wince6 R2 flash mdd performance issue. RRS feed

  • Question

  • Dear all,

              I have aleardy porting new flash mdd & pdd arch into my bsp code for support MLC NAND flash reason, but I meet a performance issue,    In fal/fmd arch  read performance is 9M/s ,but in new arch ,read performance is about 8m/s,  and i do some profiling test.  and i find the difference is :  for example: i test read a 1M file ,which buffer is 32k, and i closed diskcache, and use nobuffering argument(createfile) too.  and then read , old arch is:


    Hits       Percent Address  Module           Routine
    ---------- ------- -------- ----------------:---------------------
          9680    31.0 c0391c9c flashbinfs_nand.dll:NFI_ReadFifo
          4349    13.9 c0392e30 flashbinfs_nand.dll:ReadPage
          2068     6.6 c00d1eb0 k.coredll.dll   :memset
          1839     5.8 c00cffcc k.coredll.dll   :memcpybigblk

     

    new flash mdd arch is :


    Hits       Percent Address  Module           Routine
    ---------- ------- -------- ----------------:---------------------
         11516    25.9 c034256c flashmdd.dll    :?ComputeChecksum
          9608    21.6 c03aeb3c flashpdd_nand.dll:NFI_ReadFifo
          4450    10.0 c03afcd0 flashpdd_nand.dll:ReadPage
          2200     4.9 c00d1eb0 k.coredll.dll   :memset
          1902     4.2 c00cffcc k.coredll.dll   :memcpybigblk
           943     2.1 8c082100 kernel.dll      :CheckTakeCritSec
           656     1.4 8c091170 kernel.dll      :NKHandleCall
           592     1.3 8c0825a0 kernel.dll      :DoWaitForObjects

     

    so how can i improve the new flash mdd profermance? and write speed is ok.

    thank you for your great help.!!

     

    Thursday, July 1, 2010 1:19 PM

All replies

  • and in this example,  old read way is about  308 tick count, and new read way is about 440. if i use

    ioctl to test read speed. the speed is same(little difference).   and my wince5 bsp use a third party lib

    (which can support mlc nand flash, and the low layer must  use fal/fmd arch), and read speed is faster too.  so  i really get a big problem,and no some useful document about this issue in internet.

     

     

    Thursday, July 1, 2010 1:24 PM
  • Hi Guorke,

    My guess is that the MDD might be slower because it is designed for MLC NAND, able to operate with only one write per page.  Maybe this causes some extra reading or processing in the driver to accommodate the restriction.  The FileSystemSectorSize registry entry is one that I added for the Spansion flash PDDs.  It is not recognized by the MDD.  The PDD reports this sector size to the MDD as data bytes per sector in IOCTL_FLASH_PDD_GET_REGION_INFO.  For NAND flash, this should be the physical main page size.

     

    Regards,

    Gary 

     

    Sent: Wednesday, July 21, 2010 6:11 AM
    Subject: nand flash performance issue

     

    Dear Garret,
           I'm guorke, an wince nand flash engineer.  and I have already porting flash mdd / pdd arch in my bsp.   but i found a performance issue in read operation.  old arch(fal/fmd is faster) ,  and i searched google, and found
    Designing_with_SPI_PDD_AN_01_e,  there is some registry comment about it
    like filesystemsectorsize,  but in msdn ,no some tips about it.   so i want to know ,what this setting affect ?   In my code, I have already set right sector size in pdd code(getregiontable),  is stll set filesytemsectorsize? mdd will read it ?     I'm very apperiated if you can give me some tips.


    Wednesday, July 21, 2010 3:21 PM
  • Dear Gary & all
                  sorry for delay response for your reply,  yes,  flash mdd & pdd used mainly for mlc nand flash. and for that issue, i have alread set right page size in getregiontable,   and you have already commet filesystemsectionsize meaning, so that should not be the cuase of performance.    
                 and i still have some question.   when i do read test, the upperlayer(filesytem or partion driver)  tell fal must read 1M(512 times*2k) per transfer in fal & fmd arch.   but in flash mdd arch, the upper layer (filesystem or flash mdd)  tell pdd layer, must read 512k per transfer(max size,some is 128k).  you can add some debug info to check it  where "sector count" exists.      maybe this is root cause.
              and if i enable combin flag in fal & fmd arch(in check sg function), the read performance is slow too.  if flash mdd   do same thing, this will effect performance.
               and i'm very stranged no a ms flash driver engineer can response this issue too.

     

    Thanks.

     

     

     

     

     

     

     

     

     

    Saturday, July 31, 2010 7:38 AM
  • Hi Guorke,

    I'm not sure why the difference in read transfer sizes using FAL vs MDD.  Maybe you can pose the question to the experts at the next live chat on August 31st.  Are you running your own read test or something from the CETK?

    Regards,

    Gary

    Sunday, August 1, 2010 11:43 PM